As the semiconductor industry has progressed into nanometer technology process nodes in pursuit of higher device density, higher performance, and lower costs, challenges from both fabrication and design have resulted in the development of three dimensional designs, such as fin field effect transistors (FinFETs). A typical FinFET is fabricated with a fin structure extending from a substrate, for example, by etching into a silicon layer of the substrate. The channel of the FinFET is formed in the vertical fin. A gate structure is provided over (e.g., overlying to wrap) the fin structure. It is beneficial to have a gate structure on the channel allowing gate control of the channel around the gate structure. FinFET devices provide numerous advantages, including reduced short channel effects and increased current flow.
One advancement implemented as technology nodes shrink, in some FinFET device designs, has been the replacement of the typically polysilicon gate electrode with a metal gate electrode to improve device performance with the decreased feature sizes. Although existing methods of fabricating FinFET devices have been generally adequate for their intended purposes, they have not been entirely satisfactory in all respects. For example, challenges rise in manufacturing a metal electrode line with different dimensions for different device performance requirements.